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this is information on a product in full production. july 2013 docid023656 rev 4 1/16 16 STL100N10F7 n-channel 100 v, 0.0062 typ., 19 a, stripfet? vii deepgate? power mosfet in a powerflat? 5x6 package datasheet - production data figure 1. internal schematic diagram features ? ultra low on-resistance ? 100% avalanche tested applications ? switching applications description this device is an n-channel power mosfet developed using the 7 th generation of stripfet? deepgate? technology, with a new gate structure. the resulting power mosfet exhibits the lowest r ds(on) in all packages. am15540v2 5 6 7 8 12 34 top view d(5, 6, 7, 8) g(4) s(1, 2, 3) powerflat? 5x6 1 2 3 4 order code v dss r ds(on) max i d p tot STL100N10F7 100 v 0.0073 19 a 5 w table 1. device summary order code marking package packaging STL100N10F7 100n10f7 powerflat? 5x6 tape and reel www.st.com
contents STL100N10F7 2/16 docid023656 rev 4 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
docid023656 rev 4 3/16 STL100N10F7 electrical ratings 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 100 v v gs gate-source voltage 20 v i d (1) 1. this value is rated according to r thj-c. drain current (continuous) at t c = 25 c 80 a i d (1) drain current (continuous) at t c = 100 c 70 a i d (2) 2. this value is rated according to r thj-pcb. drain current (continuous) at t pcb = 25 c 19 a i d (2) drain current (continuous) at t pcb =100 c 13 a i dm (2)(3) 3. pulse width limited by safe operating area. drain current (pulsed) 76 a p tot (1) total dissipation at t c = 25 c 100 w p tot (2) total dissipation at t pcb = 25 c 5 w t j t stg operating junction temperature storage temperature -55 to 175 c table 3. thermal resistance symbol parameter value unit r thj-case thermal resistance junction-case 1.56 c/w r thj-pcb (1) 1. when mounted on fr-4 board of 1inch2, 2oz cu, t < 10 sec thermal resistance junction-pcb 31 c/w table 4. avalanche data symbol parameter value unit e as single pulse avalanche energy (t j = 25 c, l = 3.5 mh, i as = 15 a, v dd = 50 v, v gs = 10 v) 400 mj
electrical characteristics STL100N10F7 4/16 docid023656 rev 4 2 electrical characteristics (t case =25 c unless otherwise specified) table 5. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage (v gs = 0) i d = 250 a 100 v i dss zero gate voltage drain current (v gs = 0) v ds = 100 v v ds = 100 v; t c =125 c 1 100 a a i gss gate body leakage current (v ds = 0) v gs = +20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 4 v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 19 a 0.0062 0.0073 table 6. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds =50 v, f=1 mhz, v gs =0 - 4369 5680 pf c oss output capacitance - 823 1070 pf c rss reverse transfer capacitance -3647pf q g total gate charge v dd =50 v, i d = 19 a v gs =10 v figure 14 -6180nc q gs gate-source charge - 26 nc q gd gate-drain charge - 13 nc table 7. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd =50 v, i d = 19 a, r g =4.7 , v gs = 10 v figure 13 -27-ns t r rise time - 40 - ns t d(off) turn-off delay time - 46 - ns t f fall time - 15 - ns
docid023656 rev 4 5/16 STL100N10F7 electrical characteristics table 8. source drain diode symbol parameter test conditions min typ. max unit i sd source-drain current - 19 a i sdm (1) 1. pulse width limited by safe operating area source-drain current (pulsed) - 76 a v sd (2) 2. pulsed: pulse duration=300s, duty cycle 1.5% forward on voltage i sd = 38 a, v gs =0 - 1.2 v t rr reverse recovery time i sd = 19 a, di/dt = 100 a/s, v dd =80 v, t j =150 c -77 ns q rr reverse recovery charge - 146 nc i rrm reverse recovery current - 4 a
electrical characteristics STL100N10F7 6/16 docid023656 rev 4 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on-resistance i d 10 1 0.1 0.01 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 100ms 1s 10ms tj=175c tc=25c single pulse 100 am15617v1 - p c b i d 150 100 50 0 0 2 v ds (v) 4 (a) 1 3 200 250 v gs = 5 v v gs = 6 v v gs = 7 v v gs =8 v v gs =9 v v gs =10 v 300 am15623v1 i d 150 100 50 0 2 v gs (v) (a) 4 6 8 200 250 10 v ds = 5 v 300 am15618v1 v gs 6 4 2 0 0 20 q g (nc) (v) 8 40 60 10 v dd =50v i d =100a 12 am15624v1 r ds(on) 6 4 2 0 0 40 i d (a) (m ) 20 60 8 10 v gs =10v 80 100 12 am15621v1
docid023656 rev 4 7/16 STL100N10F7 electrical characteristics figure 8. capacitance variations figure 9. normalized b vdss vs temperature figure 10. normalized gate threshold voltage vs temperature figure 11. normalized on-resistance vs temperature figure 12. source-drain diode forward characteristics c 3000 2000 1000 0 0 40 v ds (v) (pf) 20 4000 60 ciss coss crss 80 5000 am15625v1 v ds -55 -5 t j (c) (norm) -30 70 20 45 95 0.94 0.96 0.98 1 1.02 1.04 i d = 1ma 120 am15619v1 v gs(th) 0.75 0.7 0.65 0.6 -55 -5 t j (c) (norm) -30 70 20 45 95 i d = 250 a 120 0.8 0.85 0.9 0.95 1 am15622v1 r ds(on) 1.9 1.3 0.9 0.5 -50 0 t j (c) (norm) -25 75 25 50 100 0.7 1.1 1.5 1.7 2.1 am06484v2 i d =50 a v sd 0 40 i sd (a) (v) 20 100 60 80 0.5 0.6 0.7 0.8 0.9 1 1.1 t j =-50c t j =150c t j =25c am15620v1
test circuits STL100N10F7 8/16 docid023656 rev 4 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times figure 16. unclamped inductive load test circuit figure 17. unclamped inductive waveform figure 18. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid023656 rev 4 9/16 STL100N10F7 package mechanical data 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STL100N10F7 10/16 docid023656 rev 4 table 9. powerflat 5x6 type s-r mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 d 5.00 5.20 5.40 e 5.95 6.15 6.35 d2 4.11 4.31 e2 3.50 3.70 e1.27 l 0.60 0.80 k 1.275 1.575
docid023656 rev 4 11/16 STL100N10F7 package mechanical data figure 19. powerflat 5x6 type s-r drawing 8231817_rev.f_ribbon type s-r 5 8 4 1 pin 1 identification 1 4 5 8 pin 1 identification . bottom view side view top view
package mechanical data STL100N10F7 12/16 docid023656 rev 4 figure 20. powerflat? 5x6 recommended footprint (dimensions in mm) footprint
docid023656 rev 4 13/16 STL100N10F7 packaging mechanical data 5 packaging mechanical data figure 21. powerflat? 5x6 tape (a) figure 22. powerflat? 5x6 package orientation in carrier tape. a. all dimensions are in millimeters. measured from centerline of sprocket hole to centerline of pocket. cumulative tolerance of 10 sprocket holes is 0.20 . measured from centerline of sprocket hole to centerline of pocket. (i) (ii) (iii) 2 2.00.1 (i) bo (5.300.1) ko (1.200.1) 0.05) ?1.5 min. ?1.550.05 p ao(6.300.1) f(5.500.1)(iii) w(12.000.3) 1.750.1 4.00.1 (ii) p 0 y y section y-y c l p1(8.000.1) do d1 e 1 (0.30 t ref.r0.50 ref 0.20 base and bulk quantity 3000 pcs 8234350_tape_rev_c pin 1 identification
packaging mechanical data STL100N10F7 14/16 docid023656 rev 4 figure 23. powerflat? 5x6 reel 2.20 ?21.2 13.00 core detail 2.50 1.90 r0.60 77 128 ?a r1.10 2.50 4.00 r25.00 part no. w1 w2 18.4 (max) w3 06 ps esd logo at t e n t i o n observe precautions for handling electrostatic sensitive devices 11.9/15.4 12.4 (+2/-0) a 330 (+0/-4.0) all dimensions are in millimeters ?n 178(2.0) 8234350_reel_rev_c
docid023656 rev 4 15/16 STL100N10F7 revision history 6 revision history table 10. document revision history date revision changes 05-oct-2012 1 first release. 19-feb-2013 2 ? document status chaged from preliminary to production data ? inserted: section 2.1: electrical characteristics (curves) ? updated: section 4: package mechanical data ? added: section 5: packaging mechanical data ? minor text changes 21-feb-2013 3 ? updated table 8: source drain diode and figure 5: transfer characteristics . 31-jul-2013 4 ? updated i d values in test conditions respectively in table 6: dynamic and table 7: switching times . ? modified: figure 13 , 14 , 15 and 16 ? minor text changes
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